Datasheet
PIC24F16KL402 FAMILY
DS30001037C-page 4 2011-2013 Microchip Technology Inc.
Pin Diagrams: PIC24FXXKL301/401
Note 1: Analog features (indicated in red) are not available on PIC24FXXKL301 devices.
2: Alternate location for I
2
C™ functionality of MSSP1, as determined by the I2C1SEL Configuration bit.
20-Pin QFN
(1)
89
2
3
1
12
13
14
15
106
11
1617181920
7
5
4
OSCO/AN14/C1INA/C2INC/CLKO/CN29/RA3
PGED1/AN2/ULPWU/C1IND/C2INB/U2TX/P1C/CN4/RB0
OSCI/AN13/C1INB/C2IND/CLKI/CN30/RA2
AN4/T3G/U1RX/CN6/RB2
PGEC1/AN3/C1INC/C2INA/U2RX/CN5/RB1
U1TX/INT0/CN23/RB7
SDA1/T1CK/U1RTS
/CCP3/CN21/RB9
PGEC3/SOSCO/SCLKI/U2CTS
/CN0/RA4
PGED3/SOSCI/AN15/U2RTS
/CN1/RB4
SCL1/U1CTS
/SS1/CN22/RB8
AN12/HLVDIN/SCK1/SS2/CCP2/CN14/RB12
AN11/SDO1/P1D/CN13/RB13
C2OUT/CCP1/P1A/INT2/CN8/RA6
CV
REF/AN10/SDI1/C1OUT/FLT0/INT1/CN12/RB14
AN9/SCL2/T3CK/REFO/SCK2/CN11/RB15
PGED2/CVREF-/VREF-/AN1/SDO2/CN3/RA1
PGEC2/V
REF+/CVREF+/AN0/SDA2/SDI2/CN2/RA0
MCLR
/VPP/RA5
V
DD
VSS
20-Pin PDIP/SSOP/SOIC
(1)
PIC24FXXKL301
(2)
MCLR/VPP/RA5
OSCO/AN14/C1INA/C2INC/CLKO/CN29/RA3
PGEC2/V
REF+/CVREF+/AN0/SDA2/SDI2/CN2/RA0
PGED2/CV
REF-/VREF-/AN1/SDO2/CN3/RA1
V
DD
VSS
PGED1/AN2/ULPWU/C1IND/C2INB/U2TX/P1C/CN4/RB0
U1TX/INT0/CN23/RB7
PGEC3/SOSCO/SCLKI/U2CTS
/CN0/RA4
PGED3/SOSCI/AN15/U2RTS
/CN1/RB4
SCL1/U1CTS
/SS1/CN22/RB8
OSCI/AN13/C1INB/C2IND/CLKI/CN30/RA2
AN4/T3G/U1RX/CN6/RB2
PGEC1/AN3/C1INC/C2INA/U2RX/CN5/RB1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
AN9/SCL2/T3CK/REFO/SCK2/CN11/RB15
CV
REF/AN10/SDI1/C1OUT/FLT0/INT1/CN12/RB14
AN11/SDO1/P1D/CN13/RB13
AN12/HLVDIN/SCK1/SS2
/CCP2/CN14/RB12
SDA1/T1CK/U1RTS
/CCP3/CN21/RB9
C2OUT/CCP1/P1A/INT2/CN8/RA6
PIC24FXXKL401
PIC24FXXKL301
(2)
PIC24FXXKL401