Datasheet

 2011-2013 Microchip Technology Inc. DS30001037C-page 221
PIC24F16KL402 FAMILY
FIGURE 26-13: MSSPx I
2
C™ BUS START/STOP BITS TIMING WAVEFORMS
TABLE 26-33: I
2
C™ BUS START/STOP BITS REQUIREMENTS (MASTER MODE)
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Repeated Start
condition
Setup Time 400 kHz mode 2(T
OSC)(BRG + 1) —
91 THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the
first clock pulse is
generated
Hold Time 400 kHz mode 2(T
OSC)(BRG + 1) —
92 TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) —
—
ns
Setup Time 400 kHz mode 2(TOSC)(BRG + 1)
93 THD:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns
Hold Time 400 kHz mode 2(T
OSC)(BRG + 1) —
Note: Refer to Figure 26-3 for load conditions.
SCLx
SDAx
Start
Condition
Stop
Condition
91
90
93
92