Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 216  2011-2013 Microchip Technology Inc.
FIGURE 26-8: EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
TABLE 26-28: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
Param.
No.
Symbol Characteristic Min Max Units Conditions
73 T
DIV2SCH,
T
DIV2SCL
Setup Time of SDIx Data Input to SCKx Edge 35 — ns
74 TSCH2DIL,
T
SCL2DIL
Hold Time of SDIx Data Input to SCKx Edge 40 — ns
75 TDOR SDOx Data Output Rise Time — 25 ns
76 TDOF SDOx Data Output Fall Time — 25 ns
78 T
SCR SCKx Output Rise Time (Master mode) — 25 ns
79 TSCF SCKx Output Fall Time (Master mode) — 25 ns
81 TDOV2SCH,
T
DOV2SCL
SDOx Data Output Setup to SCKx Edge T
CY —ns
F
SCK SCKx Frequency — 10 MHz
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
81
74
75, 76
78
79
73
bit 6 - - - - - - 1
LSb Inbit 6 - - - - 1
LSb
Note: Refer to Figure 26-3 for load conditions.
MSb In
MSb