Datasheet

 2011-2013 Microchip Technology Inc. DS30001037C-page 215
PIC24F16KL402 FAMILY
FIGURE 26-7: EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
TABLE 26-27: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0 )
Param
No.
Symbol Characteristic Min Max Units Conditions
73 T
DIV2SCH,
T
DIV2SCL
Setup Time of SDIx Data Input to SCKx Edge 20 — ns
74 T
SCH2DIL,
T
SCL2DIL
Hold Time of SDIx Data Input to SCKx Edge 40 — ns
75 TDOR SDOx Data Output Rise Time — 25 ns
76 TDOF SDOx Data Output Fall Time — 25 ns
78 T
SCR SCKx Output Rise Time (Master mode) — 25 ns
79 TSCF SCKx Output Fall Time (Master mode) — 25 ns
F
SCK SCKx Frequency — 10 MHz
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
73
74
75, 76
7879
7978
MSb LSbbit 6 - - - - - - 1
LSb Inbit 6 - - - - 1
Note: Refer to Figure 26-3 for load conditions.
MSb In