Datasheet

 2011-2013 Microchip Technology Inc. DS30001037C-page 137
PIC24F16KL402 FAMILY
FIGURE 17-3: MSSPx BLOCK DIAGRAM (I
2
C™ MODE)
FIGURE 17-4: MSSPx BLOCK DIAGRAM (I
2
C™ MASTER MODE)
SSPxADD
Internal Data Bus
Address Match
Set/Reset S, P bits
Shift
Clock
MSb LSb
Note: Only port I/O names are shown in this diagram. Refer to the text for a full list of multiplexed functions.
SCLx
SDAx
Start and
Stop bit Detect
Read Write
SSPxSR
SSPxBUF
Address Mask
Match Detect
Start and
Start bit, Stop bit,
Internal Data Bus
Set/Reset S, P (SSPxSTAT), WCOL;
Shift
Clock
MSb LSb
SDAx
Acknowledge
Generate
SCLx
SCLx In
Bus Collision
SDAx In
RCV Enable
Clock Cntl
Clock Arbitrate/WCOL Detect
(hold off clock source)
SSPxADD<6:0>
Baud
Set SSPxIF, BCLxIF;
Reset ACKSTAT, PEN
Rate
Generator
SSPM<3:0>
SSPxSR
SSPxBUF
Read Write
Stop bit Detect,
Write Collision Detect,
Clock Arbitration
State Counter for
End of XMIT/RCV
Start bit Detect,