Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 132  2011-2013 Microchip Technology Inc.
REGISTER 16-5: PSTR1CON: ECCP1 PULSE STEERING CONTROL REGISTER
(1)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1
CMPL1 CMPL0
— STRSYNC STRD STRC STRB STRA
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Unimplemented: Read as ‘0’
bit 7-6 CMPL<1:0>: Complementary Mode Output Assignment Steering bits
00 = Complementary output assignment is disabled; the STR<D:A> bits are used to determine
Steering mode
01 = P1A and P1B are selected as the complementary output pair
10 = P1A and P1C are selected as the complementary output pair
11 = P1A and P1D are selected as the complementary output pair
bit 5 Unimplemented: Read as ‘0’
bit 4 STRSYNC: Steering Sync bit
1 = Output steering update occurs on the next PWM period
0 = Output steering update occurs at the beginning of the instruction cycle boundary
bit 3 STRD: Steering Enable D bit
1 = P1D pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1D pin is assigned to port pin
bit 2 STRC: Steering Enable C bit
1 = P1C pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1C pin is assigned to port pin
bit 1 STRB: Steering Enable B bit
1 = P1B pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1B pin is assigned to port pin
bit 0 STRA: Steering Enable A bit
1 = P1A pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1A pin is assigned to port pin
Note 1: This register is only implemented on PIC24FXXKL40X/30X devices. In addition, PWM Steering mode is
available only when CCP1M<3:2> = 11 and PM<1:0> = 00.