Datasheet

2011-2013 Microchip Technology Inc. DS30001037C-page 127
PIC24F16KL402 FAMILY
FIGURE 16-4: SIMPLIFIED BLOCK DIAGRAM OF ENHANCED PWM MODE
DC1B<1:0>
ECCP Enable
ECCP1/P1A Output
ECCP Enable
P1B Output
ECCP Enable
P1C Output
ECCP Enable
P1D Output
PM<1:0>
2
CCP1M<3:0>
4
ECCP1DEL
CCPR1L
CCPR1H (Slave)
Comparator
TMR2
(2)
Comparator
PR2
(2)
(1)
RQ
S
Duty Cycle Registers
Clear Timer,
CCP1 Pin and
Latch D.C.
Output
Controller
ECCP1/P1A
P1B
P1C
P1D
Note 1: The 8-bit TMR2 value is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to create the 10-
bit time base.
2: Either Timer2 or Timer4 may be used as the Enhanced PWM time base.