Datasheet

 2011-2013 Microchip Technology Inc. DS30001037C-page 121
PIC24F16KL402 FAMILY
REGISTER 14-2: T3GCON: TIMER3 GATE CONTROL REGISTER
(1)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-x R/W-0 R/W-0
TMR3GE T3GPOL T3GTM T3GSPM T3GGO/
T3DONE
T3GVAL T3GSS1 T3GSS0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Unimplemented: Read as ‘0’
bit 7 TMR3GE: Timer3 Gate Enable bit
If TMR3ON =
0:
This bit is ignored.
If TMR3ON =
1:
1 = Timer counting is controlled by the Timer3 gate function
0 = Timer counts regardless of the Timer3 gate function
bit 6 T3GPOL: Timer3 Gate Polarity bit
1 = Timer gate is active-high (Timer3 counts when the gate is high)
0 = Timer gate is active-low (Timer3 counts when the gate is low)
bit 5 T3GTM: Timer3 Gate Toggle Mode bit
1 = Timer Gate Toggle mode is enabled.
0 = Timer Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer3 gate flip-flop toggles on every rising edge.
bit 4 T3GSPM: Timer3 Gate Single Pulse Mode bit
1 = Timer Gate Single Pulse mode is enabled and is controlling the Timer3 gate
0 = Timer Gate Single Pulse mode is disabled
bit 3 T3GGO/T3DONE
: Timer3 Gate Single Pulse Acquisition Status bit
1 = Timer gate single pulse acquisition is ready, waiting for an edge
0 = Timer gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T3GSPM is cleared.
bit 2 T3GVAL: Timer3 Gate Current State bit
Indicates the current state of the timer gate that could be provided to the TMR3 register; unaffected by
the state of TMR3GE.
bit 1-0 T3GSS<1:0>: Timer3 Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR2 to match PR2 output
00 = T3G input pin
Note 1: Initializing T3GCON prior to T3CON is recommended.