Datasheet
2011-2013 Microchip Technology Inc. DS30001037C-page 119
PIC24F16KL402 FAMILY
14.0 TIMER3 MODULE
The Timer3 timer/counter modules incorporate these
features:
• Software-selectable operation as a 16-bit timer or
counter
• One 16-bit readable and writable Timer Value
register
• Selectable clock source (internal or external) with
device clock, SOSC or LPRC oscillator options
• Interrupt-on-overflow
• Multiple timer gating options, including:
- User-selectable gate sources and polarity
- Gate/toggle operation
- Single Pulse (One-Shot) mode
• Module Reset on ECCP Special Event Trigger
The Timer3 module is controlled through the T3CON
register (Register 14-1). A simplified block diagram of
the Timer3 module is shown in Figure 14-1.
The F
OSC clock source should not be used with the
ECCP capture/compare features. If the timer will be
used with the capture or compare features, always
select one of the other timer clocking options.
FIGURE 14-1: TIMER3 BLOCK DIAGRAM
Note: This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive refer-
ence source. For more information on
Timers, refer to the “dsPIC33/PIC24
Family Reference Manual”, “Timers”
(DS39704).
TMR3
T3SYNC
T3CKPS<1:0>
01
Synchronized
Clock Input
2
Set Flag bit,
T3IF, on
Overflow
T3G
FOSC
SOSCO/T1CK
SOSCI
T3OSCEN
T3CK
TMR3CS<1:0>
TMR3GE
00
01
10
11
C1OUT
T3GPOL
T3GTM T3GSPM
T3GGO
T3GSS<1:0>
EN
10
00
01
FOSC/2
C2OUT/LPRC
TMR2 Match
Set T3GIF
DQ
SOSCEN
SOSC
16
One-Shot
Select
Gate
Control
SOSC Components
16
Internal Data Bus
11
LPRC
1
0
Prescaler
1, 2, 4, 8
Gate Sync
Toggle
Select