Datasheet

2011-2013 Microchip Technology Inc. DS30001037C-page 117
PIC24F16KL402 FAMILY
13.0 TIMER2 MODULE
The Timer2 module incorporates the following features:
8-bit Timer and Period registers (TMR2 and PR2,
respectively)
Readable and writable (both registers)
Software programmable prescaler (1:1, 1:4 and
1:16)
Software programmable postscaler (1:1 through
1:16)
Interrupt on TMR2 to PR2 match
Optional Timer3 gate on TMR2 to PR2 match
Optional use as the shift clock for the MSSP
modules
This module is controlled through the T2CON register
(Register 13-1), which enables or disables the timer
and configures the prescaler and postscaler. Timer2
can be shut off by clearing control bit, TMR2ON
(T2CON<2>), to minimize power consumption.
The prescaler and postscaler counters are cleared
when any of the following occurs:
A write to the TMR2 register
A write to the T2CON register
Any device Reset (POR, BOR, MCLR or
WDT Reset)
TMR2 is not cleared when T2CON is written.
A simplified block diagram of the module is shown in
Figure 13-1.
FIGURE 13-1: TIMER2 BLOCK DIAGRAM
Note: This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive
reference source. For more information
on Timers, refer to the “dsPIC33/PIC24
Family Reference Manual”, “Timers”
(DS39704).
Comparator
TMR2 Output
Postscaler
PR2
2
F
OSC/2
1:1 to 1:16
4
T2OUTPS<3:0>
T2CKPS<1:0>
Set T2IF
Internal Data Bus
8
Reset
TMR2/PR2
8
8
(to PWM or MSSPx)
Match
Prescaler
1:1, 1:4, 1:16
TMR2