Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 10  2011-2013 Microchip Technology Inc.
1.2 Other Special Features
• Communications: The PIC24F16KL402 family
incorporates multiple serial communication
peripherals to handle a range of application
requirements. The MSSP module implements
both SPI and I
2
C™ protocols, and supports both
Master and Slave modes of operation for each.
Devices also include one of two UARTs with
built-in IrDA
®
encoders/decoders.
• Analog Features: Select members of the
PIC24F16KL402 family include a 10-bit A/D
Converter module. The A/D module incorporates
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period, as
well as faster sampling speeds.
The comparator modules are configurable for a
wide range of operations and can be used as
either a single or double comparator module.
1.3 Details on Individual Family
Members
Devices in the PIC24F16KL402 family are available in
14-pin, 20-pin and 28-pin packages. The general block
diagram for all devices is shown in Figure 1-1.
The PIC24F16KL402 family may be thought of as four
different device groups, each offering a slightly different
set of features. These differ from each other in multiple
ways:
• The size of the Flash program memory
• The presence and size of data EEPROM
• The presence of an A/D Converter and the
number of external analog channels available
• The number of analog comparators
• The number of general purpose timers
• The number and type of CCP modules
(i.e., CCP vs. ECCP)
• The number of serial communications modules
(both MSSPs and UARTs)
The general differences between the different
sub-families are shown in Table 1-1. The feature sets
for specific devices are summarized in Tab le 1- 2 and
Table 1-3.
A list of the individual pin features available on the
PIC24F16KL402 family devices, sorted by function, is
provided in Table 1 -4 (for PIC24FXXKL40X/30X
devices) and Tab le 1- 5 (for PIC24FXXKL20X/10X
devices). Note that these tables show the pin location
of individual peripheral features and not how they are
multiplexed on the same pin. This information is
provided in the pinout diagrams in the beginning of this
data sheet. Multiplexed features are sorted by the
priority given to a feature, with the highest priority
peripheral being listed first.
TABLE 1-1: FEATURE COMPARISON FOR PIC24F16KL402 FAMILY GROUPS
Device Group
Program
Memory
(bytes)
Data
EEPROM
(bytes)
Timers
(8/16-bit)
CCP and
ECCP
Serial
(MSSP/
UART)
A/D
(channels)
Comparators
PIC24FXXKL10X 4K — 1/2 2/0 1/1 — 1
PIC24FXXKL20X 8K — 1/2 2/0 1/1 7 or 12 1
PIC24FXXKL30X 8K 256 2/2 2/1 2/2 — 2
PIC24FXXKL40X 8K or 16K 512 2/2 2/1 2/2 12 2