Datasheet
2008-2011 Microchip Technology Inc. DS39927C-page 93
PIC24F16KA102 FAMILY
9.3 Control Registers
The operation of the oscillator is controlled by three
Special Function Registers (SFRs):
• OSCCON
•CLKDIV
•OSCTUN
The OSCCON register (Register 9-1) is the main con-
trol register for the oscillator. It controls clock source
switching and allows the monitoring of clock sources.
The Clock Divider register (Register 9-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC oscillator.
The FRC Oscillator Tune register (Register 9-3) allows
the user to fine tune the FRC oscillator over a range of
approximately ±5.25%. Each bit increment or decre-
ment changes the factory calibrated frequency of the
FRC oscillator by a fixed amount.
REGISTER 9-1: OSCCON: OSCILLATOR CONTROL REGISTER
U-0 R-0, HSC R-0, HSC R-0, HSC U-0 R/W-x
(1)
R/W-x
(1)
R/W-x
(1)
— COSC2 COSC1 COSC0 — NOSC2 NOSC1 NOSC0
bit 15 bit 8
R/SO-0, HSC U-0 R-0, HSC
(2)
U-0 R/CO-0, HS U-0 R/W-0 R/W-0
CLKLOCK
—LOCK—CF— SOSCEN OSWEN
bit 7 bit 0
Legend: CO = Clearable Only bit
SO = Settable Only bit HS = Hardware Settable bit HSC = Hardware Settable/Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 COSC<2:0>: Current Oscillator Selection bits
111 = 8 MHz Fast RC Oscillator with Postscaler (FRCDIV)
110 = 500 kHz Low-Power Fast RC Oscillator (FRC) with Postscaler (LPFRCDIV)
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = 8 MHz FRC Oscillator with Postscaler and PLL module (FRCPLL)
000 = 8 MHz FRC Oscillator (FRC)
bit 11 Unimplemented: Read as ‘0’
bit 10-8 NOSC<2:0>: New Oscillator Selection bits
(1)
111 = 8 MHz Fast RC Oscillator with Postscaler (FRCDIV)
110 = 500 kHz Low-Power Fast RC Oscillator (FRC) with Postscaler (LPFRCDIV)
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = 8 MHz FRC Oscillator with Postscaler and PLL module (FRCPLL)
000 = 8 MHz FRC Oscillator (FRC)
Note 1: Reset values for these bits are determined by the FNOSC Configuration bits.
2: Also resets to ‘0’ during any valid clock switch or whenever a non-PLL Clock mode is selected.