Datasheet

PIC24F16KA102 FAMILY
DS39927C-page 246  2008-2011 Microchip Technology Inc.
FIGURE 29-17: SPIx MODULE MASTER MODE TIMING CHARACTERISTICS (CKE = 0)
TABLE 29-36: SPIx MASTER MODE TIMING REQUIREMENTS (CKE = 0)
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +125°C for Extended
Param
No.
Symbol Characteristic Min Typ
(1)
Max Units Conditions
SP10 TscL SCKx Output Low Time
(2)
TCY/2 — — ns
SP11 TscH SCKx Output High Time
(2)
TCY/2 — — ns
SP20 TscF SCKx Output Fall Time
(3)
—1025ns
SP21 TscR SCKx Output Rise Time
(3)
—1025ns
SP30 TdoF SDOx Data Output Fall Time
(3)
—1025ns
SP31 TdoR SDOx Data Output Rise Time
(3)
—1025ns
SP35 TscH2doV,
TscL2doV
SDOx Data Output Valid after
SCKx Edge
— — 30 ns
SP40 TdiV2scH,
TdiV2scL
Setup Time of SDIx Data Input
to SCKx Edge
20 — — ns
SP41 TscH2diL,
TscL2diL
Hold Time of SDIx Data Input
to SCKx Edge
20 — — ns
Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
2: The minimum clock period for SCKx is 100 ns; therefore, the clock generated in Master mode must not
violate this specification.
3: Assumes 50 pF load on all SPIx pins.
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
SP11
SP10
SP40
SP41
SP21
SP20
SP35
SP20
SP21
MSb
LSb
Bit 14 - - - - - -1
LSb In
Bit 14 - - - -1
SP30
SP31
MSb In