Datasheet

 2008-2011 Microchip Technology Inc. DS39927C-page 179
PIC24F16KA102 FAMILY
REGISTER 22-5: AD1PCFG: A/D PORT CONFIGURATION REGISTER
R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 U-0 U-0
PCFG15 PCFG14
— PCFG12 PCFG11 PCFG10 — —
bit 15 bit 8
U
-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PCFG15: Analog Input Pin Configuration Control bit
1 = Analog channel is disabled from input scan
0 = Internal band gap (V
BG) channel is enabled for input scan
bit 14 PCFG14: Analog Input Pin Configuration Control bit
1 = Analog channel is disabled from input scan
0 = Internal V
BG/2 channel is enabled for input scan
bit 13 Unimplemented: Read as ‘0’
bit 12-10 PCFG<12:10>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read is enabled
0 = Pin is configured in Analog mode; I/O port read is disabled; A/D samples pin voltage
bit 9-6 Unimplemented: Read as ‘0’
bit 5-0 PCFG<5:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read is enabled
0 = Pin configured in Analog mode; I/O port read is disabled; A/D samples pin voltage