Datasheet

2008-2011 Microchip Technology Inc. DS39927C-page 145
PIC24F16KA102 FAMILY
bit 3 S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware is set or clear when Start, Repeated Start or Stop is detected.
bit 2 R/W: Read/Write Information bit (when operating as I
2
C slave)
1 = Read – indicates the data transfer is output from slave
0 = Write – indicates the data transfer is input to slave
Hardware is set or clear after reception of I
2
C device address byte.
bit 1 RBF: Receive Buffer Full Status bit
1 = Receive complete, I2C1RCV is full
0 = Receive not complete, I2C1RCV is empty
Hardware is set when I2C1RCV is written with received byte; hardware is clear when software reads I2C1RCV.
bit 0 TBF: Transmit Buffer Full Status bit
1 = Transmit in progress, I2C1TRN is full
0 = Transmit complete, I2C1TRN is empty
Hardware is set when software writes to I2C1TRN; hardware is clear at completion of data transmission.
REGISTER 17-2: I2C1STAT: I2C1 STATUS REGISTER (CONTINUED)