Datasheet

 2008-2011 Microchip Technology Inc. DS39927C-page 129

PIC24F16KA102 FAMILY

15.4 Output Compare Register

U-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0

— —OCSIDL — — — — —

bit 15 bit 8

U-0 U-0 U-0 R-0, HC R/W-0 R/W-0 R/W-0 R/W-0

— — — OCFLT OCTSEL OCM2 OCM1 OCM0

bit 7 bit 0

Legend: HC = Hardware Clearable bit

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15-14 Unimplemented: Read as ‘0’

bit 13 OCSIDL: Stop Output Compare 1 in Idle Mode Control bit

1 = Output Compare 1 will halt in CPU Idle mode

0 = Output Compare 1 will continue to operate in CPU Idle mode

bit 12-5 Unimplemented: Read as ‘0’

bit 4 OCFLT: PWM Fault Condition Status bit

1 = PWM Fault condition has occurred (cleared in HW only)

0 = No PWM Fault condition has occurred (this bit is only used when OCM<2:0> = 111)

bit 3 OCTSEL: Output Compare 1 Timer Select bit

1 = Timer3 is the clock source for Output Compare 1

0 = Timer2 is the clock source for Output Compare 1

Refer to the device data sheet for specific time bases available to the output compare module.

bit 2-0 OCM<2:0>: Output Compare 1 Mode Select bits

111 = PWM mode on OC1, Fault pin; OCF1 enabled

(1)

110 = PWM mode on OC1, Fault pin; OCF1 disabled

(1)

101 = Initialize OC1 pin low, generate continuous output pulses on OC1 pin

100 = Initialize OC1 pin low, generate single output pulse on OC1 pin

011 = Compare event toggles OC1 pin

010 = Initialize OC1 pin high, compare event forces OC1 pin low

001 = Initialize OC1 pin low, compare event forces OC1 pin high

000 = Output compare channel is disabled

Note 1: The OCFA pin controls the OC1 channel.