Datasheet

PIC24F04KA201 FAMILY

R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1

FCKSM1 FCKSM0 SOSCSEL POSCFREQ1 POSCFREQ0 OSCIOFNC POSCMD1 POSCMD0

bit 7 bit 0

Legend:

R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7-6 FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits

1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled

01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled

00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled

bit 5 SOSCSEL: Secondary Oscillator Select Bit

1 = Secondary oscillator configured for high-power operation

0 = Secondary oscillator configured for low-power operation

bit 4-3 POSCFREQ<1:0>: Primary Oscillator Frequency Range Configuration bits

11 = Primary oscillator/external clock input frequency greater than 8 MHz

10 = Primary oscillator/external clock input frequency between 100 kHz and 8 MHz

01 = Primary oscillator/external clock input frequency less than 100 kHz

00 = Reserved; do not use

bit 2 OSCIOFNC: CLKO Enable Configuration bit

1 = CLKO output signal active on the OSCO pin; primary oscillator must be disabled or configured for

the External Clock mode (EC) for the CLKO to be active (POSCMD<1:0> = 11 or 00)

0 = CLKO output disabled

bit 1-0 POSCMD<1:0>: Primary Oscillator Configuration bits

11 = Primary oscillator disabled

10 = HS Oscillator mode selected

01 = XT Oscillator mode selected

00 = External Clock mode selected