Datasheet

© 2009 Microchip Technology Inc. Preliminary DS39937B-page 149
PIC24F04KA201 FAMILY
REGISTER 19-5: AD1PCFG: A/D PORT CONFIGURATION REGISTER
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 U-0 U-0
— — — PCFG12 PCFG11 PCFG10 — —
bit 15 bit 8
U
-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 Unimplemented: Read as ‘0’
bit 12-10 PCFG<12:10>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
bit 9-6 Unimplemented: Read as ‘0’
bit 5-0 PCFG<5:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
REGISTER 19-6: AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — CSSL12 CSSL11 CSSL10 — —
bit 15 bit 8
U
-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — CSSL5 CSSL4 CSSL3 CSSL2 CSSL1 CSSL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 Unimplemented: Read as ‘0’
bit 12-10 CSSL<12:10>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
bit 9-6 Unimplemented: Read as ‘0’
bit 5-0 CSSL<5:0>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan