Datasheet

PIC24F04KA201 FAMILY

bit 3 S: Start bit

1 = Indicates that a Start (or Repeated Start) bit has been detected last

0 = Start bit was not detected last

Hardware set or clear when Start, Repeated Start or Stop detected.

bit 2 R/W: Read/Write Information bit (when operating as I

C slave)

1 = Read – indicates data transfer is output from slave

0 = Write – indicates data transfer is input to slave

Hardware set or clear after reception of I

C device address byte.

bit 1 RBF: Receive Buffer Full Status bit

1 = Receive complete, I2C1RCV is full

0 = Receive not complete, I2C1RCV is empty

Hardware set when I2C1RCV is written with received byte; hardware clear when software reads I2C1RCV.

bit 0 TBF: Transmit Buffer Full Status bit

1 = Transmit in progress, I2C1TRN is full

0 = Transmit complete, I2C1TRN is empty

Hardware set when software writes to I2C1TRN; hardware clear at completion of data transmission.