Datasheet

PIC24F04KA201 FAMILY
DS39937B-page 118 Preliminary © 2009 Microchip Technology Inc.
FIGURE 15-1: SPI1 MODULE BLOCK DIAGRAM (STANDARD BUFFER MODE)
Internal Data Bus
SDI1
SDO1
SS1
/FSYNC1
SCK1
SPI1SR
bit 0
Shift
Control
Edge
Select
F
CY
Primary
1:1/4/16/64
Enable
Prescaler
Sync
SPI1BUF
Control
Transfer
Transfer
Write SPI1BUF
Read SPI1BUF
16
SPI1CON1<1:0>
SPI1CON1<4:2>
Master Clock
Secondary
Prescaler
1:1 to 1:8
Clock
Control