Datasheet

PIC18F87K90 FAMILY
DS39957D-page 312  2009-2011 Microchip Technology Inc.
TABLE 21-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page:
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 75
PIR1
— ADIF RC1IF TX1IF SSP1IF TMR1GIF TMR2IF TMR1IF 77
PIE1 — ADIE RC1IE TX1IE SSP1IE TMR1GIE TMR2IE TMR1IE 77
IPR1 — ADIP RC1IP TX1IP SSP1IP TMR1GIP TMR2IP TMR1IP 77
PIR2
OSCFIF —SSP2IFBCL2IF BCL1IF HLVDIF TMR3IF TMR3GIF 77
PIE2 OSCFIE —SSP2IEBCL2IE BCL1IE HLVDIE TMR3IE TMR3GIE 77
IPR2 OSCFIP —SSP2IPBCL2IP BCL1IP HLVDIP TMR3IP TMR3GIP 77
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 78
TRISD TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 78
TRISF TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 — 78
SSP1BUF MSSP1 Receive Buffer/Transmit Register 82
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 76
SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 76
SSP1STAT SMP CKE
D/A P S R/W UA BF
76
SSP2CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 82
SSP2CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 83
SSP2STAT SMP CKE
D/A P S R/W UA BF
82
SSP2BUF MSSP2 Receive Buffer/Transmit Register 82
ODCON3 U2OD U1OD
— — — — — CTMUDS 81
Legend: Shaded cells are not used by the MSSP module in SPI mode.