Datasheet

PIC18F87K90 FAMILY
DS39957D-page 280  2009-2011 Microchip Technology Inc.
20.2 LCD Clock Source Selection
The LCD driver module has three possible clock
sources:
•(F
OSC/4)/8192
• SOSC Clock/32
•INTRC/32
The first clock source is the system clock divided by
8,192 ((F
OSC/4)/8192). This divider ratio is chosen to
provide about 1 kHz output when the system clock is
8 MHz. The divider is not programmable. Instead, the
LCD prescaler bits, LCDPS<3:0>, are used to set the
LCD frame clock rate.
The second clock source is the SOSC oscillator/32.
This also outputs about 1 kHz when a 32.768 kHz
crystal is used with the SOSC oscillator. To use the
SOSC oscillator as a clock source, set the SOSCEN
(T1CON<3>) bit.
The third clock source is a 31.25 kHz internal RC
oscillator/32 that provides approximately 1 kHz output.
The second and third clock sources may be used to
continue running the LCD while the processor is in
Sleep.
These clock sources are selected through the bits
CS<1:0> (LCDCON<3:2>).
20.2.1 LCD PRESCALER
A 16-bit counter is available as a prescaler for the LCD
clock. The prescaler is not directly readable or writable.
Its value is set by the LP<3:0> bits (LCDPS<3:0>) that
determines the prescaler assignment and prescale ratio.
Selectable prescale values are from 1:1 through
1:32,768, in power-of-2 increments.
FIGURE 20-2: LCD CLOCK GENERATION
CS<1:0>
SOSC 32 kHz
Crystal Oscillator
LF-INTOSC Oscillator
Nom F
RC = 31.25 kHz
STAT
DUP
TRIP
QUAD
÷4
LMUX<1:0>
4-Bit Prog Prescaler
÷1, 2, 3, 4
Ring Counter
LMUX<1:0>
COM0 COM1 COM2 COM3
÷8192
(FOSC/4)
÷2
÷32
÷32
LP<3:0>
(LCDCON<3:2>)
(LCDCON<1:0>)
(LCDCON<1:0>)
(LCDPS<3:0>)
System Clock