Datasheet

 2010 Microchip Technology Inc. Preliminary DS39979A-page 459
PIC18F87J72 FAMILY
B.6.3 GAIN CONFIGURATION REGISTER
This registers contains the settings for the PGA gains
for each channel, as well as the BOOST options for
each channel.
REGISTER B-3: GAIN: GAIN CONFIGURATION REGISTER (ADDRESS 0x08)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PGA_CH1
<2>
PGA_CH1
<1>
PGA_CH1
<0>
BOOST<1> BOOST<0> PGA_CH0
<2>
PGA_CH0
<1>
PGA_CH0
<0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 PGA_CH1<2:0>: PGA Setting for Channel 1 bits
111 = Reserved (Gain = 1)
110 = Reserved (Gain = 1)
101 = Gain is 32
100 = Gain is 16
011 = Gain is 8
010 = Gain is 4
001 = Gain is 2
000 = Gain is 1
bit 4-3 BOOST<1:0>: Current Scaling for High-Speed Operation bits
11 = Both channels have current x 2
10 = Channel 1 has current x 2
01 = Channel 0 has current x 2
00 = Neither channel has current x 2
bit 2-0 PGA_CH0<2:0>: PGA Setting for Channel 0 bits
111 = Reserved (Gain = 1)
110 = Reserved (Gain = 1)
101 = Gain is 32
100 = Gain is 16
011 = Gain is 8
010 = Gain is 4
001 = Gain is 2
000 = Gain is 1