Datasheet

PIC18F87J72 FAMILY
DS39979A-page 424 Preliminary  2010 Microchip Technology Inc.
ADC Performance (continued)
Integral Non-Linearity (Note 4) INL — 15 — ppm GAIN = 1,
DITHER = ON
Input Impedance Z
IN 350——k Proportional to
1/AMCLK
Signal-to-Noise and Distortion
Ratio (Notes 4, 6)
SINAD — 90 — dB OSR = 256,
DITHER = ON
—78 — dBOSR = 64,
DITHER = OFF
Total Harmonic Distortion
(Notes 4, 6)
THD — -101 — dB OSR = 256,
DITHER = ON
— -82 — dB OSR = 64,
DITHER = OFF
Signal-to-Noise Ratio
(Notes 4, 6)
SNR — 91 — dB OSR = 256,
DITHER = ON
—81 — dBOSR = 64,
DITHER = OFF
Spurious Free Dynamic Range
(Note 4)
SFDR — 103 — dB OSR = 256,
DITHER = ON
—83 — dBOSR = 64,
DITHER = OFF
Crosstalk (50/60 Hz) (Note 4) CTALK — -133 — dB OSR = 256,
DITHER = ON
AC Power Supply Rejection AC PSRR — -77 — dB SAV
DD and SVDD = 5V +
1V
PP
@ 50/60 Hz
DC Power Supply Rejection DC PSRR — -77 — dB SAV
DD and SVDD = 4.5 to
5.5V
DC Common-Mode Rejection
Ratio (Note 4)
CMRR — -72 — dB V
CM varies from -1V to
+1V
TABLE 29-26: DUAL-CHANNEL AFE ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated: SAVDD = 4.5 to 5.5V, SVDD = 2.7 to 5.5V, -40°C < TA <+85°C,
MCLK = 4 MHz, PRESCALE = 1, OSR = 64, GAIN = 1, Dithering Off, V
IN = -0.5, dBFS = 353 mVRMS @ 50/60 Hz
Parameters Symbol Min Typical Max Units Conditions
Note 1: Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk of damage.
2: For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00,
VREFEXT = 0, CLKEXT = 0.
3: This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the maximum
signal range, VIN = -0.5 dBFS @ 50/60 Hz = 353 mVRMS, mVREF = 2.4V.
4: See Appendix B.3 “Terminology and Formulas” for definitions.
5: Applies to all gains. Offset error is dependent on PGA gain setting.
6: This parameter is established by characterization and is not 100% tested.
7: For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz.
AMCLK = MCLK/PRESCALE.
8: For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11,
VREFEXT = 1, CLKEXT = 1.