Datasheet

 2010 Microchip Technology Inc. Preliminary DS39979A-page 423
PIC18F87J72 FAMILY
TABLE 29-26: DUAL-CHANNEL AFE ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated: SAVDD = 4.5 to 5.5V, SVDD = 2.7 to 5.5V, -40°C < TA <+85°C,
MCLK = 4 MHz, PRESCALE = 1, OSR = 64, GAIN = 1, Dithering Off, V
IN = -0.5, dBFS = 353 mVRMS @ 50/60 Hz
Parameters Symbol Min Typical Max Units Conditions
Internal Voltage Reference
Internal Voltage Reference
Tol er a nc e
V
REF -2% 2.37 +2% V VREFEXT = 0
Temperature Coefficient TC
REF — 12 — ppm/°C VREFEXT = 0
Output Impedance ZOUTREF —7 —k SAVDD = 5V,
VREFEXT = 0
Voltage Reference Input
Input Capacitance — — — 10 pF
Differential Input Voltage Range
(V
REF+ – VREF-)
V
REF 2.2 — 2.6 V VREF = (VREF+ – VREF-),
VREFEXT = 1
Absolute Voltage on REFIN+ Pin V
REF+ 1.9 — 2.9 V VREFEXT = 1
Absolute Voltage on REFIN- Pin V
REF--0.3—0.3V
ADC Performance
Resolution (no missing codes) — 24 — — bits OSR = 256
Sampling Frequency f
S
125 — 1000 kHz f
S
= DMCLK = MCLK/
(4 x Prescale)
Output Data Rate f
D
0.4882 — 31.25 ksps f
D
= DRCLK = DMCLK/
OSR = MCLK/
(4 x Prescale x OSR)
Analog Input Absolute Voltage on
CH0+, CH0-, CH1+, CH1- Pins
CHn+/- -1 — +1 V All analog input channels,
measured to SAVss
(Note 1)
Analog Input Leakage Current AIN —1 —nA(Note 2)
Differential Input Voltage Range (CHn+ – CHn-) — — 500/GAIN mV (Note 3)
Offset Error (Note 4) V
OS -3 — +3 mV (Note 5)
Offset Error Drift — — 3 — V/°C From -40°C to +125°C
Gain Error (Note 4) GE — -0.4 — % G = 1
-2.5 — +2.5 % All gains
Gain Error Drift — — 1 — ppm/°C From -40°C to +125°C
Note 1: Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk of damage.
2: For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00,
VREFEXT = 0, CLKEXT = 0.
3: This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the maximum
signal range, V
IN = -0.5 dBFS @ 50/60 Hz = 353 mVRMS, mVREF = 2.4V.
4: See Appendix B.3 “Terminology and Formulas” for definitions.
5: Applies to all gains. Offset error is dependent on PGA gain setting.
6: This parameter is established by characterization and is not 100% tested.
7: For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz.
AMCLK = MCLK/PRESCALE.
8: For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11,
VREFEXT = 1, CLKEXT = 1.