Datasheet

PIC18F87J72 FAMILY
DS39979A-page 322 Preliminary  2010 Microchip Technology Inc.
REGISTER 26-3: CONFIG2L: CONFIGURATION REGISTER 2 LOW (BYTE ADDRESS 300002h)
R/WO-1 R/WO-1 U-0 R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1
IESO FCMEN
— LPT1OSC T1DIG FOSC2 FOSC1 FOSC0
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 IESO: Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit
1 = Two-Speed Start-up is enabled
0 = Two-Speed Start-up is disabled
bit 6 FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
bit 5 Unimplemented: Read as ‘0’
bit 4 LPT1OSC: T1OSC/SOSC Power Selection Configuration bit
1 = High-power T1OSC/SOSC circuit is selected
0 = Low-power T1OSC/SOSC circuit is selected
bit 3 T1DIG: T1CKI for Digital Input Clock Enable bit
1 = T1CKI is available as a digital input without enabling T1OSCEN
0 = T1CKI is not available as a digital input without enabling T1OSCEN
bit 2-0 FOSC<2:0>: Oscillator Selection bits
111 = ECPLL OSC1/OSC2 as primary; ECPLL oscillator with PLL is enabled; CLKO on RA6
110 = EC OSC1/OSC2 as primary; external clock with F
OSC/4 output
101 = HSPLL OSC1/OSC2 as primary; high-speed crystal/resonator with software PLL control
100 = HS OSC1/OSC2 as primary; high-speed crystal/resonator
011 = INTPLL1 internal oscillator block with software PLL control; F
OSC/4 output
010 = INTIO1 internal oscillator block with F
OSC/4 output on RA6 and I/O on RA7
001 = INTPLL2 internal oscillator block with software PLL control and I/O on RA6 and RA7
000 = INTIO2 internal oscillator block with I/O on RA6 and RA7