Datasheet

 2010 Microchip Technology Inc. Preliminary DS39979A-page 285
PIC18F87J72 FAMILY
22.2 AFE Register Map
The dual-channel AFE uses its own internal registers
for data and control. This memory is not mapped to the
microcontroller’s SFR space, but is accessed through
the AFE’s serial interface. The memory space is
divided into eight registers:
• Two 24-bit registers, one for the data of each ADC
• Five 8-bit control registers
• One reserved 8-bit register address
Although the data registers are 24 bits wide, they may
be directly addressed as three different 8-bit registers.
The complete memory map is listed in Table 22-1.
All registers are fully described in Section B.6 “Internal
Registers” of the AFE reference.
Registers may be read singly in a single read opera-
tion; continuously, as part of a group of registers; or
continuously, by type (i.e., data registers vs. control
registers). The type of read operation is handled
through the AFE’s serial interface by selecting the type
of read operation. The grouping of registers is shown in
Table 22-2. A complete description of the different read
operations and how to implement them is described in
Section B.5.3 “Reading from the Device” of the AFE
reference.
.
TABLE 22-2: REGISTER MAP GROUPING FOR CONTINUOUS READ MODES
TABLE 22-1: AFE REGISTER MAP
Address Name Bits R/W Description
00h DATA_CH0 24 R Channel 0 ADC Data <23:0>, MSB First
03h DATA_CH1 24 R Channel 1 ADC Data <23:0>, MSB First
06h Reserved 8 — Reserved; ignore reads, do not write
07h PHASE 8 R/W Phase Delay Configuration Register
08h GAIN 8 R/W Gain Configuration Register
09h STATUS/COM 8 R/W Status/Communication Register
0Ah CONFIG1 8 R/W Configuration Register 1
0Bh CONFIG2 8 R/W Configuration Register 2
Function Address
READ<1:0>
“01”“10”“11”
DATA_CH0
00h
Group
Type
Loop Entire
Register Map
01h
02h
DATA_CH1
03h
Group04h
05h
PHASE 07h
Group
Type
GAIN 08h
STATUS/COM 09h
GroupCONFIG1 0Ah
CONFIG2 0Bh