Datasheet

 2010 Microchip Technology Inc. Preliminary DS39979A-page 155
PIC18F87J72 FAMILY
15.6 Register Maps
Table 15-5, Table 15-6 and Table 15-7 summarize the
registers associated with the RTCC module.
TABLE 15-5: RTCC CONTROL REGISTERS
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
on Page
RTCCFG RTCEN
— RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 54
RTCCAL CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 54
PADCFG1
— — — — — RTSECSEL1 RTSECSEL0 —54
ALRMCFG ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 54
ALRMRPT ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0 54
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 80-pin devices.
TABLE 15-6: RTCC VALUE REGISTERS
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All Resets
on Page
RTCVALH RTCC Value High Register Window Based on RTCPTR<1:0> 54
RTCVALL RTCC Value Low Register Window Based on RTCPTR<1:0> 54
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 80-pin devices.
TABLE 15-7: ALARM VALUE REGISTERS
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All Resets
on Page
ALRMVALH Alarm Value High Register Window Based on ALRMPTR<1:0> 54
ALRMVALL Alarm Value Low Register Window Based on ALRMPTR<1:0> 54
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 80-pin devices.