Datasheet

PIC18F87J72 FAMILY
DS39979A-page 112 Preliminary  2010 Microchip Technology Inc.
TABLE 10-7: PORTC FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RC0/T1OSO/
T13CKI
RC0 0 O DIG LATC<0> data output.
1 I ST PORTC<0> data input.
T1OSO x O ANA Timer1 oscillator output; enabled when Timer1 oscillator is enabled. Disables
digital I/O and LCD segment driver.
T13CKI 1 I ST Timer1/Timer3 counter input.
RC1/T1OSI/
CCP2/SEG32
RC1 0 O DIG LATC<1> data output.
1 I ST PORTC<1> data input.
T1OSI x I ANA Timer1 oscillator input.
CCP2
(1)
0 O DIG CCP2 Compare/PWM output.
1 I ST CCP2 Capture input.
SEG32 x O ANA LCD Segment 32 output; disables all other pin functions.
RC2/CCP1/
SEG13
RC2 0 O DIG LATC<2> data output.
1 I ST PORTC<2> data input.
CCP1 0 O DIG CCP1 Compare/PWM output; takes priority over port data.
1 I ST CCP1 Capture input.
SEG13 x O ANA LCD Segment 13 output; disables all other pin functions.
RC3/SCK/SCL/
SEG17
RC3 0 O DIG LATC<3> data output.
1 I ST PORTC<3> data input.
SCK 0 O DIG SPI clock output (MSSP module); takes priority over port data.
1 I ST SPI clock input (MSSP module).
SCL 0 ODIGI
2
C™ clock output (MSSP module); takes priority over port data.
1 II2CI
2
C clock input (MSSP module); input type depends on module setting.
SEG17 x O ANA LCD Segment 17 output; disables all other pin functions.
RC4/SDI/SDA/
SEG16
RC4 0 O DIG LATC<4> data output.
1 I ST PORTC<4> data input.
SDI I ST SPI data input (MSSP module).
SDA 1 ODIGI
2
C data output (MSSP module); takes priority over port data.
1 II2CI
2
C data input (MSSP module); input type depends on module setting.
SEG16 x O ANA LCD Segment 16 output; disables all other pin functions.
RC5/SDO/
SEG12
RC5 0 O DIG LATC<5> data output.
1 I ST PORTC<5> data input.
SDO 0 O DIG SPI data output (MSSP module).
SEG12 x O ANA LCD Segment 12 output; disables all other pin functions.
RC6/TX1/CK1/
SEG27
RC6 0 O DIG LATC<6> data output.
1 I ST PORTC<6> data input.
TX1 1 O DIG Synchronous serial data output (EUSART module); takes priority over port data.
CK1 1 O DIG Synchronous serial data input (EUSART module); user must configure as an input.
1 I ST Synchronous serial clock input (EUSART module).
SEG27 x O ANA LCD Segment 27 output; disables all other pin functions.
RC7/RX1/DT1/
SEG28
RC7 0 O DIG LATC<7> data output.
1 I ST PORTC<7> data input.
RX1 1 I ST Asynchronous serial receive data input (EUSART module).
DT1 1 O DIG Synchronous serial data output (EUSART module); takes priority over port data.
1 I ST Synchronous serial data input (EUSART module); user must configure as an input.
SEG28 x O ANA LCD Segment 28 output; disables all other pin functions.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input, TTL = TTL Buffer Input,
I2C = I
2
C/SMBus Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: Default assignment for CCP2 when CCP2MX Configuration bit is set.