Datasheet

 2007-2012 Microchip Technology Inc. DS39778E-page 25
PIC18F87J11 FAMILY
PORTE is a bidirectional I/O port.
RE0/AD8/PMRD/P2D
RE0
AD8
PMRD
(6)
P2D
4
I/O
I/O
I/O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 8.
Parallel Master Port read strobe.
ECCP2 PWM Output D.
RE1/AD9/PMWR/P2C
RE1
AD9
PMWR
(6)
P2C
3
I/O
I/O
I/O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 9.
Parallel Master Port write strobe.
ECCP2 PWM Output C.
RE2/AD10/PMBE/P2B
RE2
AD10
PMBE
(6)
P2B
78
I/O
I/O
O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 10.
Parallel Master Port byte enable.
ECCP2 PWM Output B.
RE3/AD11/PMA13/P3C/REFO
RE3
AD11
PMA13
P3C
(3)
REFO
77
I/O
I/O
O
O
O
ST
TTL
—
—
—
Digital I/O.
External Memory Address/Data 11.
Parallel Master Port address.
ECCP3 PWM Output C.
Reference clock out.
RE4/AD12/PMA12/P3B
RE4
AD12
PMA12
P3B
(3)
76
I/O
I/O
O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 12.
Parallel Master Port address.
ECCP3 PWM Output B.
RE5/AD13/PMA11/P1C
RE5
AD13
PMA11
P1C
(3)
75
I/O
I/O
O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 13.
Parallel Master Port address.
ECCP1 PWM Output C.
RE6/AD14/PMA10/P1B
RE6
AD14
PMA10
P1B
(3)
74
I/O
I/O
O
O
ST
TTL
—
—
Digital I/O.
External Memory Address/Data 14.
Parallel Master Port address.
ECCP1 PWM Output B.
RE7/AD15/PMA9/ECCP2/P2A
RE7
AD15
PMA9
ECCP2
(4)
P2A
(4)
73
I/O
I/O
O
I/O
O
ST
TTL
—
ST
—
Digital I/O.
External Memory Address/Data 15.
Parallel Master Port address.
Capture 2 input/Compare 2 output/PWM2 output.
ECCP2 PWM Output A.
TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
80-TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C = ST with I
2
C™ or SMB levels
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).