Datasheet

PIC18F87J11 FAMILY

DS39778E-page 170  2007-2012 Microchip Technology Inc.

R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 BUSY: Busy bit (Master mode only)

1 = Port is busy

0 = Port is not busy

bit 6-5 IRQM<1:0>: Interrupt Request Mode bits

11 = Interrupt is generated when Read Buffer 3 is read or Write Buffer 3 is written (Buffered PSP

mode), or on a read or write operation when PMA<1:0> = 11 (Addressable PSP mode only)

10 = No interrupt generated, processor stall is activated

01 = Interrupt is generated at the end of the read/write cycle

00 = No interrupt is generated

bit 4-3 INCM<1:0>: Increment Mode bits

11 = PSP read and write buffers auto-increment (Legacy PSP mode only)

10 = Decrements ADDR<15,13:0> by 1 every read/write cycle

01 = Increments ADDR<15,13:0> by 1 every read/write cycle

00 = No increment or decrement of address

bit 2 MODE16: 8/16-Bit Mode bit

1 = 16-Bit mode: Data register is 16 bits, a read or write to the Data register invokes two 8-bit transfers

0 = 8-Bit mode: Data register is 8 bits, a read or write to the Data register invokes one 8-bit transfer

bit 1-0 MODE<1:0>: Parallel Port Mode Select bits

11 = Master Mode 1 (PMCSx, PMRD/PMWR, PMENB, PMBE, PMA<x:0> and PMD<7:0>)

10 = Master Mode 2 (PMCSx, PMRD, PMWR, PMBE, PMA<x:0> and PMD<7:0>)

01 = Enhanced PSP, control signals (PMRD, PMWR, PMCS, PMD<7:0> and PMA<1:0>)

00 = Legacy Parallel Slave Port mode, control signals (PMRD, PMWR, PMCS and PMD<7:0>)