Datasheet

PIC18F87J10 FAMILY
DS39663F-page 396 © 2009 Microchip Technology Inc.
BSF .................................................................................. 305
BTFSC .............................................................................306
BTFSS .............................................................................. 306
BTG .................................................................................. 307
BZ ..................................................................................... 308
C
C Compilers
MPLAB C18 .............................................................344
MPLAB C30 .............................................................344
Calibration (A/D Converter) .............................................. 269
CALL ................................................................................ 308
CALLW .............................................................................337
Capture (CCP Module) ..................................................... 171
Associated Registers ...............................................173
CCP Pin Configuration ............................................. 171
CCPRxH:CCPRxL Registers ................................... 171
Prescaler ..................................................................171
Software Interrupt .................................................... 171
Timer1/Timer3 Mode Selection ................................ 171
Capture (ECCP Module) .................................................. 180
Capture/Compare/PWM (CCP) ........................................ 169
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 170
CCPRxH Register .................................................... 170
CCPRxL Register ..................................................... 170
Compare Mode. See Compare.
Module Configuration ...............................................170
Timer Interconnect Configurations ........................... 170
Clock Sources .................................................................... 34
Selection and the FOSC2 Configuration Bit ............... 35
Selection Using OSCCON Register ........................... 35
CLRF ................................................................................309
CLRWDT ..........................................................................309
Code Examples
16 x 16 Signed Multiply Routine .............................. 108
16 x 16 Unsigned Multiply Routine .......................... 108
8 x 8 Signed Multiply Routine .................................. 107
8 x 8 Unsigned Multiply Routine .............................. 107
Changing Between Capture Prescalers ................... 171
Computed GOTO Using an Offset Value ................... 65
Erasing Flash Program Memory ................................90
Fast Register Stack .................................................... 65
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 78
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service ..................................159
Initializing PORTA .................................................... 126
Initializing PORTB .................................................... 128
Initializing PORTC .................................................... 131
Initializing PORTD .................................................... 134
Initializing PORTE .................................................... 137
Initializing PORTF .................................................... 140
Initializing PORTG ...................................................142
Initializing PORTH .................................................... 144
Initializing PORTJ .................................................... 146
Loading the SSP1BUF (SSP1SR) Register ............. 196
Reading a Flash Program Memory Word .................. 89
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 124
Writing to Flash Program Memory ............................. 92
Code Protection ............................................................... 281
COMF ............................................................................... 310
Comparator ...................................................................... 271
Analog Input Connection Considerations ................ 275
Associated Registers ............................................... 275
Configuration ........................................................... 272
Effects of a Reset .................................................... 274
Interrupts ................................................................. 274
Operation ................................................................. 273
Operation During Sleep ........................................... 274
Outputs .................................................................... 273
Reference ................................................................ 273
External Signal ................................................ 273
Internal Signal .................................................. 273
Response Time ........................................................ 273
Comparator Specifications ............................................... 361
Comparator Voltage Reference ....................................... 277
Accuracy and Error .................................................. 278
Associated Registers ............................................... 279
Configuring .............................................................. 277
Connection Considerations ...................................... 278
Effects of a Reset .................................................... 278
Operation During Sleep ........................................... 278
Compare (CCP Module) .................................................. 172
Associated Registers ............................................... 173
CCPRx Register ...................................................... 172
Pin Configuration ..................................................... 172
Software Interrupt .................................................... 172
Timer1/Timer3 Mode Selection ................................ 172
Compare (ECCP Module) ................................................ 180
Special Event Trigger .............................. 165, 180, 268
Computed GOTO ............................................................... 65
Configuration Bits ............................................................ 281
Configuration Register Protection .................................... 292
Core Features
Easy Migration ............................................................. 6
Expanded Memory ....................................................... 5
Extended Instruction Set ............................................. 5
External Memory Bus .................................................. 5
nanoWatt Technology .................................................. 5
Oscillator Options and Features .................................. 5
CPFSEQ .......................................................................... 310
CPFSGT .......................................................................... 311
CPFSLT ........................................................................... 311
Crystal Oscillator/Ceramic Resonator ................................ 31
Customer Change Notification Service ............................ 405
Customer Notification Service ......................................... 405
Customer Support ............................................................ 405
D
Data Addressing Modes .................................................... 78
Comparing Addressing Modes with
the Extended Instruction Set Enabled ............... 82
Direct ......................................................................... 78
Indexed Literal Offset ................................................ 81
BSR ................................................................... 83
Instructions Affected .......................................... 81
Mapping Access Bank ....................................... 83
Indirect ....................................................................... 78
Inherent and Literal .................................................... 78
Data Memory ..................................................................... 68
Access Bank .............................................................. 71
Bank Select Register (BSR) ...................................... 68
Extended Instruction Set ........................................... 81
General Purpose Registers ....................................... 71