Datasheet

PIC18F87K90 FAMILY
DS39957D-page 564  2009-2011 Microchip Technology Inc.
S
SCKx.................................................................................303
SDIx .................................................................................. 303
SDOx................................................................................. 303
SEC_IDLE Mode.................................................................59
SEC_RUN Mode ................................................................. 54
Secondary Oscillator (SOSC) ............................................. 45
Selective Peripheral Module Control................................... 60
Serial Clock, SCKx............................................................ 303
Serial Data In (SDIx) ......................................................... 303
Serial Data Out (SDOx)..................................................... 303
Serial Peripheral Interface.
See SPI Mode.
SETF ................................................................................. 485
Shoot-Through Current ..................................................... 267
Slave Select (SSx
) ............................................................ 303
SLEEP............................................................................... 486
Software Simulator (MPLAB SIM).....................................503
Special Event Trigger.
See Compare (CCP Module).
Special Event Trigger.
See Compare (ECCP Mode).
Specifications
AC (Timing) Characteristics
Temperature and Voltage ................................. 524
Capture/Compare/PWM Requirements
(ECCP1, ECCP2)..............................................532
CLKO and I/O Requirements .................................... 527
Comparator ...............................................................522
EUSART/AUSART Synchronous Receive
Requirements.................................................... 541
EUSART/AUSART Synchronous Transmission
Requirements.................................................... 541
Example SPI Mode Requirements (Master Mode,
CKE = 0) ...........................................................533
Example SPI Mode Requirements (Master Mode,
CKE = 1) ...........................................................534
Example SPI Mode Requirements (Slave Mode,
CKE = 0) ...........................................................535
Example SPI Slave Mode Requirements
(CKE = 1) .......................................................... 536
External Clock Requirements ................................... 525
High/Low-Voltage Detect Characteristics ................. 530
I
2
C Bus Data Requirements (Slave Mode) ............... 538
I
2
C Bus Start/Stop Bits Requirements
(Slave Mode)..................................................... 537
Internal RC Accuracy (INTOSC) ............................... 526
Internal Voltage Regulator ........................................ 522
Memory Programming Requirements ....................... 521
MSSP I
2
C Bus Data Requirements .......................... 540
MSSP I
2
C Bus Start/Stop Bits Requirements ........... 539
PLL Clock Timing......................................................526
Timer0 and Timer1 External Clock
Requirements.................................................... 531
Ultra Low-Power Wake-up ........................................ 541
Voltage Reference .................................................... 522
SSPOV..............................................................................339
SSPOV Status Flag........................................................... 339
SSPxSTAT Register
R/W
Bit.............................................................. 318, 321
SSx
.................................................................................... 303
Stack Full/Underflow Resets ............................................... 89
SUBFSR............................................................................ 497
SUBFWB........................................................................... 486
SUBLW ............................................................................. 487
SUBULNK ......................................................................... 497
SUBWF .............................................................................487
SUBWFB........................................................................... 488
SWAPF ............................................................................. 488
T
Table Pointer Operations (table)....................................... 114
Table Reads/Table Writes .................................................. 89
TBLRD .............................................................................. 489
TBLWT.............................................................................. 490
Timer0............................................................................... 183
Associated Registers................................................ 185
Operation.................................................................. 184
Overflow Interrupt ..................................................... 185
Prescaler .................................................................. 185
Switching Assignment ...................................... 185
Prescaler Assignment (PSA Bit) ............................... 185
Prescaler Select (T0PS2:T0PS0 Bits) ...................... 185
Reads and Writes in 16-Bit Mode............................. 184
Source Edge Select (T0SE Bit) ................................ 184
Source Select (T0CS Bit).......................................... 184
Timer1............................................................................... 187
16-Bit Read/Write Mode ........................................... 191
Associated Registers................................................ 197
Clock Source Selection............................................. 189
Gate.......................................................................... 193
Interrupt .................................................................... 192
Operation.................................................................. 189
Oscillator................................................................... 187
Resetting, Using the ECCP Special
Event Trigger .................................................... 193
SOSC Oscillator........................................................ 191
Layout Considerations...................................... 192
Use as a Clock Source ..................................... 192
TMR1H Register....................................................... 187
TMR1L Register........................................................ 187
Timer2............................................................................... 199
Associated Registers................................................ 200
Interrupt .................................................................... 200
Operation.................................................................. 199
Output....................................................................... 200
PR2 Register ............................................................ 248
TMR12 to PR12 Match Flag (TMR12IF Bit).............. 138
TMR2 to PR2 Match Interrupt................................... 248
Timer3/5/7......................................................................... 201
16-Bit Read/Write Mode ........................................... 206
Associated Registers................................................ 211
Gates ........................................................................ 206
Operation.................................................................. 205
Overflow Interrupt ............................................. 201, 210
SOSC Oscillator........................................................ 201
Use as a Clock Source ..................................... 206
Special Event Trigger (ECCP).................................. 210
TMRxH Register ....................................................... 201
TMRxL Register........................................................ 201
Timer4/6/8/10/12............................................................... 213
Associated Registers................................................ 215
Interrupt .................................................................... 215
Operation.................................................................. 213
Output....................................................................... 215
Outputs, PWM Time Base for ECCP ........................ 215
Postscaler.
See Postscaler, Timer4/6/8/10/12.
Prescaler.
See Prescaler, Timer4/6/8/10/12.
PRx Register............................................................. 213
TMRx Register.......................................................... 213
TMRx to PRx Match Interrupt ........................... 213, 215