Datasheet

PIC18F87K22 FAMILY
DS39960D-page 80  2009-2011 Microchip Technology Inc.
INDF2 PIC18F6XK22 PIC18F8XK22 N/A N/A N/A
POSTINC2 PIC18F6XK22 PIC18F8XK22 N/A N/A N/A
POSTDEC2 PIC18F6XK22 PIC18F8XK22 N/A N/A N/A
PREINC2 PIC18F6XK22 PIC18F8XK22 N/A N/A N/A
PLUSW2 PIC18F6XK22 PIC18F8XK22 N/A N/A N/A
FSR2H PIC18F6XK22 PIC18F8XK22 ---- xxxx ----uuuu ---- uuuu
FSR2L PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
STATUS PIC18F6XK22 PIC18F8XK22 ---x xxxx ---u uuuu ---u uuuu
TMR0H PIC18F6XK22 PIC18F8XK22 0000 0000 uuuu uuuu uuuu uuuu
TMR0L PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
T0CON PIC18F6XK22 PIC18F8XK22 1111 1111 1111 1111 uuuu uuuu
SPBRGH1 PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
OSCCON PIC18F6XK22 PIC18F8XK22 0110 q000 0110 q000 uuuu quuu
IPR5 PIC18F65K22 PIC18F85K22 ---1 -111 ---1 -111 ---u -uuu
IPR5
PIC18F66K22
PIC18F67K22
PIC18F86K22
PIC18F87K22
1000 0000 1000 0000 uuuu uuuu
WDTCON PIC18F6XK22 PIC18F8XK22 0-x0 -000 0-x0 -000 u-uu -uuu
RCON PIC18F6XK22 PIC18F8XK22 0111 11qq 0uqq qquu uuuu qquu
TMR1H PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
TMR1L PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
T1CON PIC18F6XK22 PIC18F8XK22 0000 0000 uuuu uuuu uuuu uuuu
TMR2 PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
PR2 PIC18F6XK22 PIC18F8XK22 1111 1111 1111 1111 uuuu uuuu
T2CON PIC18F6XK22 PIC18F8XK22 -000 0000 -000 0000 -uuu uuuu
SSP1BUF PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
SSP1ADD PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
SSP1STAT PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
SSP1CON1 PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
SSP1CON2 PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
ADRESH PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
ADRESL PIC18F6XK22 PIC18F8XK22 xxxx xxxx uuuu uuuu uuuu uuuu
ADCON0 PIC18F6XK22 PIC18F8XK22 -000 0000 -000 0000 -uuu uuuu
ADCON1 PIC18F6XK22 PIC18F8XK22 0000 0000 0000 0000 uuuu uuuu
ADCON2 PIC18F6XK22 PIC18F8XK22 0-00 0000 0-00 0000 u-uu uuuu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt, and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.