Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 67

PIC18F87K22 FAMILY

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

PSPMD CTMUMD RTCCMD

(1)

TMR4MD TMR3MD TMR2MD TMR1MD EMBMD

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 PSPMD: Peripheral Module Disable (PMD) PSP Enable/Disable bit

1 = PMD is enabled for PSP, disabling all of its clock sources

0 = PMD is disabled for PSP

bit 6 CTMUMD: PMD CTMU Enable/Disable bit

1 = PMD is enabled for CTMU, disabling all of its clock sources

0 = PMD is disabled for CTMU

bit 5 RTCCMD: PMD RTCC Enable/Disable bit

(1)

1 = PMD is enabled for RTCC, disabling all of its clock sources

0 = PMD is disabled for RTCC

bit 4 TMR4MD: TMR4MD Disable bit

1 = PMD is enabled and all TMR4MD clock sources are disabled

0 = PMD is disabled and TMR4MD is enabled

bit 3 TMR3MD: TMR3MD Disable bit

1 = PMD is enabled and all TMR3MD clock sources are disabled

0 = PMD is disabled and TMR3MD is enabled

bit 2 TMR2MD: TMR2MD Disable bit

1 = PMD is enabled and all TMR2MD clock sources are disabled

0 = PMD is disabled and TMR2MD is enabled

bit 1 TMR1MD: TMR1MD Disable bit

1 = PMD is enabled and all TMR1MD clock sources are disabled

0 = PMD is disabled and TMR1MD is enabled

bit 0 EMBMD: PMD EMB Enable/Disable bit

1 = PMD is enabled for EMB, disabling all of its clock sources

0 = PMD is disabled for EMB

Note 1: RTCCMD can only be set to ‘1’ after an EECON2 unlock sequence. Refer to Section 18.0 “Real-Time

Clock and Calendar (RTCC)” for the unlock sequence (Example 18-1).