Datasheet

PIC18F87K22 FAMILY
DS39960D-page 66  2009-2011 Microchip Technology Inc.
REGISTER 4-2: PMD2: PERIPHERAL MODULE DISABLE REGISTER 2
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TMR10MD
(1)
TMR8MD TMR7MD
(1)
TMR6MD TMR5MD CMP3MD CMP2MD CMP1MD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 TMR10MD: TMR10MD Disable bit
(1)
1 = Peripheral Module Disable (PMD) is enabled and all TMR10MD clock sources are disabled
0 = PMD is disabled and TMR10MD is enabled
bit 6 TMR8MD: TMR8MD Disable bit
1 = PMD is enabled and all TMR8MD clock sources are disabled
0 = PMD is disabled and TMR8MD is enabled
bit 5 TMR7MD: TMR7MD Disable bit
(1)
1 = PMD is enabled and all TMR7MD clock sources are disabled
0 = PMD is disabled and TMR7MD is enabled
bit 4 TMR6MD: TMR6MD Disable bit
1 = PMD is enabled and all TMR6MD clock sources are disabled
0 = PMD is disabled and TMR6MD is enabled
bit 3 TMR5MD: TMR5MD Disable bit
1 = PMD is enabled and all TMR5MD clock sources are disabled
0 = PMD is disabled and TMR5MD is enabled
bit 2 CMP3MD: PMD Comparator 3 Enable/Disable bit
1 = PMD is enabled for Comparator 3, disabling all of its clock sources
0 = PMD is disabled for Comparator 3
bit 1 CMP2MD: PMD Comparator 3 Enable/Disable bit
1 = PMD is enabled for Comparator 2, disabling all of its clock sources
0 = PMD is disabled for Comparator 2
bit 0 CMP1MD: PMD Comparator 3 Enable/Disable bit
1 = PMD is enabled for Comparator 1, disabling all of its clock sources
0 = PMD is disabled for Comparator 1
Note 1: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).