Datasheet

PIC18F87K22 FAMILY
DS39960D-page 544  2009-2011 Microchip Technology Inc.
Operation .................................................................. 237
Calibration......................................................... 240
Clock Source..................................................... 238
Digit Carry Rules...............................................238
General Functionality ........................................ 239
Leap Year ......................................................... 239
Register Mapping.............................................. 239
ALRMVAL .................................................240
RTCVAL.................................................... 239
Safety Window for Register Reads
and Writes................................................. 239
Write Lock.........................................................239
Register Interface......................................................237
Register Maps........................................................... 243
Reset......................................................................... 242
Device ............................................................... 242
Power-on Reset (POR) ..................................... 242
Sleep Mode............................................................... 242
Value Registers (RTCVAL) ....................................... 232
RTCEN Bit Write ............................................................... 237
S
SCKx.................................................................................281
SDIx .................................................................................. 281
SDOx................................................................................. 281
SEC_IDLE Mode.................................................................63
SEC_RUN Mode ................................................................. 58
Selective Peripheral Module Control................................... 64
Serial Clock, SCKx............................................................ 281
Serial Data In (SDIx) ......................................................... 281
Serial Data Out (SDOx)..................................................... 281
Serial Peripheral Interface.
See SPI Mode.
SETF .................................................................................465
Shoot-Through Current ..................................................... 275
Slave Select (SSx
) ............................................................ 281
SLEEP............................................................................... 466
Software Simulator (MPLAB SIM).....................................483
Special Event Trigger.
See Compare (CCP Module).
Special Event Trigger.
See Compare (ECCP Mode).
SPI Mode (MSSP)............................................................. 281
Associated Registers ................................................ 290
Bus Mode Compatibility ............................................ 289
Clock Speed, Interactions ......................................... 289
Effects of a Reset......................................................289
Enabling SPI I/O ....................................................... 285
Master Mode ............................................................. 286
Master/Slave Connection .......................................... 285
Operation .................................................................. 284
Operation in Power-Managed Modes ....................... 289
Serial Clock............................................................... 281
Serial Data In ............................................................ 281
Serial Data Out .........................................................281
Slave Mode ............................................................... 287
Slave Select .............................................................. 281
Slave Select Synchronization ...................................287
SPI Clock .................................................................. 286
SSPxBUF Register ...................................................286
SSPxSR Register......................................................286
Typical Connection ...................................................285
SSPOV..............................................................................317
SSPOV Status Flag........................................................... 317
SSPxSTAT Register
R/W
Bit.............................................................. 296, 299
SSx
................................................................................... 281
Stack Full/Underflow Resets............................................... 91
SUBFSR ........................................................................... 477
SUBFWB .......................................................................... 466
SUBLW ............................................................................. 467
SUBULNK......................................................................... 477
SUBWF............................................................................. 467
SUBWFB .......................................................................... 468
SWAPF ............................................................................. 468
T
Table Pointer Operations (table)....................................... 114
Table Reads/Table Writes .................................................. 91
TBLRD .............................................................................. 469
TBLWT.............................................................................. 470
Timer0............................................................................... 193
Associated Registers................................................ 195
Operation.................................................................. 194
Overflow Interrupt ..................................................... 195
Prescaler .................................................................. 195
Switching Assignment ...................................... 195
Prescaler Assignment (PSA Bit) ............................... 195
Prescaler Select (T0PS2:T0PS0 Bits) ...................... 195
Reads and Writes in 16-Bit Mode............................. 194
Source Edge Select (T0SE Bit) ................................ 194
Source Select (T0CS Bit).......................................... 194
Timer1............................................................................... 197
16-Bit Read/Write Mode ........................................... 201
Associated Registers................................................ 207
Clock Source Selection............................................. 199
Gate.......................................................................... 203
Interrupt .................................................................... 202
Operation.................................................................. 199
Oscillator................................................................... 197
SOSC Layout Considerations........................... 202
Oscillator, as Secondary Clock................................... 48
Resetting, Using the ECCP Special
Event Trigger .................................................... 203
SOSC Oscillator........................................................ 201
TMR1H Register....................................................... 197
TMR1L Register........................................................ 197
Using SOSC as a Clock Source ............................... 202
Timer2............................................................................... 209
Associated Registers................................................ 210
Interrupt .................................................................... 210
Operation.................................................................. 209
Output....................................................................... 210
PR2 Register ............................................................ 255
TMR2 to PR2 Match Interrupt................................... 255
Timer3/5/7......................................................................... 211
16-Bit Read/Write Mode ........................................... 216
Associated Registers................................................ 222
Gates ........................................................................ 217
Operation.................................................................. 215
Oscillator................................................................... 211
Overflow Interrupt ............................................. 211, 221
Special Event Trigger (ECCP).................................. 221
TMRxH Register ....................................................... 211
TMRxL Register........................................................ 211
Using SOSCO Oscillator as Clock Source ............... 216
Timer4
MSSP Clock Shift ..................................................... 224