Datasheet

PIC18F87K22 FAMILY
DS39960D-page 426 2009-2011 Microchip Technology Inc.
28.6 Program Verification and
Code Protection
The user program memory is divided into four blocks
for the PIC18FX5K22 and PIC18FX6K22 devices, and
eight blocks for PIC18FX7K22 devices. One of these is
a boot block of 1 or 2 Kbytes. The remainder of the
memory is divided into blocks on binary boundaries.
Each of the blocks has three code protection bits
associated with them. They are:
Code-Protect bit (CPx)
Write-Protect bit (WRTx)
External Block Table Read bit (EBTRx)
Figure 28-6 shows the program memory organization for
48, 64, 96 and 128 Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 28-4.
FIGURE 28-6: CODE-PROTECTED PROGRAM MEMORY FOR THE PIC18F87K22 FAMILY
(1)
000000h
200000h
3FFFFFh
01FFFFh
Note 1: Sizes of memory areas are not to scale.
2: Boot block size is determined by the BBSIZ0 bit (CONFIG4L<4>).
Code Memory
Unimplemented
Read as ‘
0
Configuration
and ID
Space
Device/Memory Size
(2)
Address
PIC18FX7K22 PIC18FX6K22 PIC18FX5K22
BBSIZ =
1
BBSIZ =
0
BBSIZ =
1
BBSIZ =
0
BBSIZ =
1
BBSIZ =
0
Boot
Block
2kW
Boot
Block
Boot
Block
2kW
Boot
Block
Boot
Block
2kW
Boot
Block
0000h
Block 0
7kW
Block 0
7kW
Block 0
3kW
0800h
Block 0
6kW
Block 0
6kW
Block 0
2kW
1000h
17FFh
Block 1
4kW
Block 1
4kW
1800
3FFF
Block 1
8kW
Block 1
8kW
Block 1
8kW
Block 1
8kW
Block 2
4kW
Block 2
4kW
4000h
5FFFh
Block 3
4kW
Block 3
4kW
6000h
7FFF
Block 2
8kW
Block 2
8kW
Block 2
8kW
Block 2
8kW
8000h
BFFFh
Block 3
8kW
Block 3
8kW
Block 3
8kW
Block 3
8kW
C000h
FFFFh
Block 4
8kW
Block 4
8kW
10000h
13FFFh
Block 5
8kW
Block 5
8kW
14000h
17FFFh
Block 6
8kW
Block 6
8kW
18000h
1BFFFh
Block 7
8kW
Block 7
8kW
1C000h
1FFFFh