Datasheet

PIC18F87K22 FAMILY
DS39960D-page 422  2009-2011 Microchip Technology Inc.
28.3.2 OPERATION OF REGULATOR IN
SLEEP
The difference in the two regulators’ operation arises
with Sleep mode. The ultra low-power regulator gives
the device the lowest current in the Regulator Enabled
mode.
The on-chip regulator can go into a lower power mode,
when the device goes to Sleep, by setting the REGSLP
bit (WDTCON<7>). This puts the regulator in a Standby
mode so that the device consumes much less current.
The on-chip regulator can also go into the Ultra Low-
Power mode, which consumes the lowest current
possible with the regulator enabled. This mode is
controlled by the RETEN
bit (CONFIG1L<0>) and
SRETEN bit (WDTCON<4>).
The various modes of regulator operation are shown in
Table 28-3.
When the ultra low-power regulator is in Sleep mode,
the internal reference voltages in the chip will be shut
off and any interrupts referring to the internal reference
will not wake up the device. If the BOR or LVD is
enabled, the regulator will keep the internal references
on and the lowest possible current will not be achieved.
When using the ultra low-power regulator in Sleep
mode, the device will take about 250
s, typical, to start
executing the code after it wakes up.
TABLE 28-3: SLEEP MODE REGULATOR SETTINGS
(1)
Regulator Power Mode
VREGSLP
WDTCON<7>
SRETEN
WDTCON<4>
RETEN
CONFIG1L<0>
Enabled Normal Operation (Sleep) 0x1
Enabled Low-Power mode (Sleep) 1x1
Enabled Normal Operation (Sleep) 00x
Enabled Low-Power mode (Sleep) 10x
Enabled Ultra Low-Power mode (Sleep) x10
Note 1: x = Indicates that VIT status is invalid.