Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 417
PIC18F87K22 FAMILY
REGISTER 28-13: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)
U-0 R/C-1 U-0 U-0 U-0 U-0 U-0 U-0
— EBTRB
(2)
— — — — — —
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
EBTRB: Boot Block Table Read Protection bit
(2)
1 = Boot block is not protected from table reads executed in other blocks
(1)
0 = Boot block is protected from table reads executed in other blocks
(1)
bit 5-0 Unimplemented: Read as ‘0’
Note 1: For the memory size of the blocks, see Figure 28-6.
2: Enable the corresponding CPx bit to protect the block from external read operations.