Datasheet

PIC18F87K22 FAMILY
DS39960D-page 416  2009-2011 Microchip Technology Inc.
REGISTER 28-12: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1
EBTR7
(1,3)
EBTR6
(1,3)
EBTR5
(1,3)
EBTR4
(1,3)
EBTR3
(3)
EBTR2
(3)
EBTR1
(3)
EBTR0
(3)
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
EBTR7: Table Read Protection bit
(1,3)
1 = Block 7 is not protected from table reads executed in other blocks
(2)
0 = Block 7 is protected from table reads executed in other blocks
(2)
bit 6 EBTR6: Table Read Protection bit
(1,3)
1 = Block 6 is not protected from table reads executed in other blocks
(2)
0 = Block 6 is protected from table reads executed in other blocks
(2)
bit 5 EBTR5: Table Read Protection bit
(1,3)
1 = Block 5 is not protected from table reads executed in other blocks
(2)
0 = Block 5 is protected from table reads executed in other blocks
(2)
bit 4 EBTR4: Table Read Protection bit
(1,3)
1 = Block 4 is not protected from table reads executed in other blocks
(2)
0 = Block 4 is protected from table reads executed in other blocks
(2)
bit 3 EBTR3: Table Read Protection bit
(3)
1 = Block 3 is not protected from table reads executed in other blocks
(2)
0 = Block 3 is protected from table reads executed in other blocks
(2)
bit 2 EBTR2: Table Read Protection bit
(3)
1 = Block 2 is not protected from table reads executed in other blocks
(2)
0 = Block 2 is protected from table reads executed in other blocks
(2)
bit 1 EBTR1: Table Read Protection bit
(3)
1 = Block 1 is not protected from table reads executed in other blocks
(2)
0 = Block 1 is protected from table reads executed in other blocks
(2)
bit 0 EBTR0: Table Read Protection bit
(3)
1 = Block 0 is not protected from table reads executed in other blocks
(2)
0 = Block 0 is protected from table reads executed in other blocks
(2)
Note 1: This bit is available only on PIC18F67K22 and PIC18F87K22 devices.
2: For the memory size of the blocks, see Figure 28-6
3: Enable the corresponding CPx bit to protect the block from external read operations.