Datasheet

PIC18F87K22 FAMILY
DS39960D-page 360  2009-2011 Microchip Technology Inc.
FIGURE 23-4: A/D BLOCK DIAGRAM
VREF+
Reference
Voltage
VNCFG
CHS<4:0>
AN23
(1)
AN22
(1)
AN4
AN3
AN2
AN1
AN0
10111
10110
00100
00011
00010
00001
00000
12-Bit
A/D
VREF-
VSS
(2)
Converter
1.024V Band Gap
V
DDCORE
Reserved CTMU
(Unimplemented)
11111
11110
11101
11100
11011
11010
11001
11000
Note 1: Channels, AN15 through AN12, and AN20 through AN23, are not available on 64-pin devices.
2: I/O pins have diode protection to VDD and VSS.
(Unimplemented)
(Unimplemented)
(Unimplemented)
Negative Input Voltage
Positive Input Voltage
CHSN<2:0>
AN6
AN5
AN0
AV
SS
111
110
001
000
AN2
VCFG<1:0>
AN3
V
DD
11
10
01
00
Internal VREF+
(4.096V)
Internal V
REF+
(2.048V)
Reserved
Temperature Diode