Datasheet
2009-2011 Microchip Technology Inc. DS39960D-page 359
PIC18F87K22 FAMILY
The analog reference voltage is software-selectable to
either the device’s positive and negative supply voltage
(AV
DD and AVSS) or the voltage level on the
RA3/AN3/V
REF+ and RA2/AN2/VREF- pins. VREF+ has
two additional Internal Reference Voltage selections:
2.048V and 4.096V.
The A/D Converter can uniquely operate while the
device is in Sleep mode. To operate in Sleep, the A/D
conversion clock must be derived from the A/D
Converter’s internal RC oscillator.
The output of the Sample-and-Hold (S/H) is the input
into the converter, which generates the result via
successive approximation.
Each port pin associated with the A/D Converter can be
configured as an analog input or a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE
bit (ADCON0<1>) is
cleared and the A/D Interrupt Flag bit, ADIF (PIR1<6>),
is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset. These registers will contain unknown
data after a Power-on Reset.
The block diagram of the A/D module is shown in
Figure 23-4.
REGISTER 23-10: ANCON2: A/D PORT CONFIGURATION REGISTER 2
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
ANSEL23
(1)
ANSEL22
(1)
ANSEL21
(1)
ANSEL20
(1)
ANSEL19 ANSEL18 ANSEL17 ANSEL16
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0
ANSEL<23:16>: Analog Port Configuration bits (AN23 through AN16)
(1)
1 = Pin is configured as an analog channel; digital input is disabled and any inputs read as ‘0’
0 = Pin is configured as a digital port
Note 1: AN15 through AN12 and AN23 through AN20 are implemented only on 80-pin devices. For 64-pin
devices, the corresponding ANSELx bits are still implemented for these channels, but have no effect.