Datasheet
2009-2011 Microchip Technology Inc. DS39960D-page 25
PIC18F87K22 FAMILY
PORTA is a bidirectional I/O port.
RA0/AN0/ULPWU
RA0
AN0
ULPWU
30
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 0.
Ultra Low-Power Wake-up input.
RA1/AN1
RA1
AN1
29
I/O
I
TTL
Analog
Digital I/O.
Analog Input 1.
RA2/AN2/V
REF-
RA2
AN2
V
REF-
28
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 2.
A/D reference voltage (low) input.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
27
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 3.
A/D reference voltage (high) input.
RA4/T0CKI
RA4
T0CKI
34
I/O
I
ST
ST
Digital I/O.
Timer0 external clock input.
RA5/AN4/T1CKI/
T3G/HLVDIN
RA5
AN4
T1CKI
T3G
HLVDIN
33
I/O
I
I
I
I
TTL
Analog
ST
ST
Analog
Digital I/O.
Analog Input 4.
Timer1 clock input.
Timer3 external clock gate input.
High/Low-Voltage Detect input.
RA6 See the OSC2/CLKO/RA6 pin.
RA7 See the OSC1/CLKI/RA7 pin.
TABLE 1-4: PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C= I
2
C™/SMBus
Note 1: Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
3: Not available on PIC18F65K22 and PIC18F85K22 devices.
4: PSP is available only in Microcontroller mode.
5: The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).