Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 247
PIC18F87K22 FAMILY
REGISTER 19-3: CCPTMRS2: CCP TIMER SELECT REGISTER 2
U-0 U-0 U-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0
— — — C10TSEL0
(1)
— C9TSEL0
(1)
C8TSEL1 C8TSEL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 C10TSEL0: CCP10 Timer Selection bit
(1)
0 = CCP10 is based off of TMR1/TMR2
1 = CCP10 is based off of TMR7/TMR2
bit 3 Unimplemented: Read as ‘0’
bit 2 C9TSEL0: CCP9 Timer Selection bit
(1)
0 = CCP9 is based off of TMR1/TMR2
1 = CCP9 is based off of TMR7/TMR4
bit 1-0 C8TSEL<1:0>: CCP8 Timer Selection bits
On Non 32-Byte Device Variants:
00 = CCP8 is based off of TMR1/TMR2
01 = CCP8 is based off of TMR7/TMR4
10 = CCP8 is based off of TMR7/TMR6
11 = Reserved; do not use
On 32-Byte Device Variants (PIC18F65K22 and PIC18F85K22):
00 = CCP8 is based off of TMR1/TMR2
01 = CCP8 is based off of TMR1/TMR4
10 = CCP8 is based off of TMR1/TMR6
11 = Reserved; do not use
Note 1: This bit is unimplemented and reads as ‘0’ on devices with 32 Kbytes of program memory
(PIC18FX5K22).