Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 23
PIC18F87K22 FAMILY
VSS 9, 25, 41, 56 P — Ground reference for logic and I/O pins.
VDD 26, 38, 57 P — Positive supply for logic and I/O pins.
AV
SS 20 P — Ground reference for analog modules.
AVDD 19 P — Positive supply for analog modules.
ENVREG 18 I ST Enable for on-chip voltage regulator.
V
DDCORE/VCAP
VDDCORE
VCAP
10
P—
Core logic power or external filter capacitor connection.
External filter capacitor connection (regulator
enabled/disabled).
TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
QFN/TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to VDD)
I
2
C= I
2
C™/SMBus
Note 1: Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
3: Not available on PIC18F65K22 and PIC18F85K22 devices.
4: The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).