Datasheet

PIC18F87K22 FAMILY
DS39960D-page 224 2009-2011 Microchip Technology Inc.
17.2 Timer4/6/8/10/12 Interrupt
The Timer4/6/8/10/12 modules have eight-bit Period
registers, PRx, that are both readable and writable.
Timer4/6/8/10/12 increment from 00h until they match
PR4/6/8/10/12 and then reset to 00h on the next
increment cycle. The PRx registers are initialized to
FFh upon Reset.
17.3 Output of TMRx
The outputs of TMRx (before the postscaler) are used
only as a PWM time base for the ECCP modules. They
are not used as baud rate clocks for the MSSP
modules as is the Timer2 output.
FIGURE 17-1: TIMER4 BLOCK DIAGRAM
REGISTER 17-1: TxCON: TIMERx CONTROL REGISTER
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TxOUTPS3 TxOUTPS2 TxOUTPS1 TxOUTPS0 TMRxON TxCKPS1 TxCKPS0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 Unimplemented: Read as ‘0
bit 6-3 TxOUTPS<3:0>: Timerx Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
bit 2 TMRxON: Timerx On bit
1 = Timerx is on
0 = Timerx is off
bit 1-0 TxCKPS<1:0>: Timerx Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
Comparator
TMRx Output
TMRx
Postscaler
Prescaler
PRx
2
F
OSC/4
1:1 to 1:16
1:1, 1:4, 1:16
4
TxOUTPS<3:0>
TxCKPS<1:0>
Set TMRxIF
Internal Data Bus
8
Reset
TMRx/PRx
8
8
(to PWM)
Match