Datasheet

PIC18F87K22 FAMILY
DS39960D-page 22  2009-2011 Microchip Technology Inc.
PORTG is a bidirectional I/O port.
RG0/ECCP3/P3A
RG0
ECCP3
P3A
3
I/O
I/O
O
ST
ST
—
Digital I/O.
Capture 3 input/Compare 3 output/PWM3 output.
ECCP3 PWM Output A.
RG1/TX2/CK2/AN19/
C3OUT
RG1
TX2
CK2
AN19
C3OUT
4
I/O
O
I/O
I
O
ST
—
ST
Analog
—
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX2/DT2).
Analog Input 19.
Comparator 3 output.
RG2/RX2/DT2/AN18/
C3INA
RG2
RX2
DT2
AN18
C3INA
5
I/O
I
I/O
I
I
ST
ST
ST
Analog
Analog
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX2/CK2).
Analog Input 18.
Comparator 3 Input A.
RG3/CCP4/AN17/P3D/
C3INB
RG3
CCP4
AN17
P3D
C3INB
6
I/O
I/O
I
O
I
ST
S/T
Analog
—
Analog
Digital I/O.
Capture 4 input/Compare 4 output/PWM4 output.
Analog Input 18.
ECCP3 PWM Output D.
Comparator 3 Input B.
RG4/RTCC/T7CKI/T5G/
CCP5/AN16/P1D/C3INC
RG4
RTCC
T7CKI
(3)
T5G
CCP5
AN16
P1D
C3INC
8
I/O
O
I
I
I/O
I
O
I
ST
—
ST
ST
ST
Analog
—
Analog
Digital I/O.
RTCC output
Timer7 clock input.
Timer5 external clock gate input.
Capture 5 input/Compare 5 output/PWM5 output.
Analog Input 16.
ECCP1 PWM Output D.
Comparator 3 Input C.
RG5 7 See the MCLR
/RG5 pin.
TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
QFN/TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C= I
2
C™/SMBus
Note 1: Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
3: Not available on PIC18F65K22 and PIC18F85K22 devices.
4: The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).