Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 213
PIC18F87K22 FAMILY
16.1 Timer3/5/7 Gate Control Register
The Timer3/5/7 Gate Control register (TxGCON),
provided in Register 14-2, is used to control the Timerx
gate.
REGISTER 16-2: TxGCON: TIMERx GATE CONTROL REGISTER
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-x R/W-0 R/W-0
TMRxGE TxGPOL TxGTM TxGSPM TxGGO/TxDONE
TxGVAL TxGSS1 TxGSS0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 TMRxGE: Timerx Gate Enable bit
If TMRxON =
0:
This bit is ignored.
If TMRxON = 1:
1 = Timerx counting is controlled by the Timerx gate function
0 = Timerx counts regardless of Timerx gate function
bit 6 TxGPOL: Timerx Gate Polarity bit
1 = Timerx gate is active-high (Timerx counts when gate is high)
0 = Timerx gate is active-low (Timerx counts when gate is low)
bit 5 TxGTM: Timerx Gate Toggle Mode bit
1 = Timerx Gate Toggle mode is enabled.
0 = Timerx Gate Toggle mode is disabled and toggle flip-flop is cleared
Timerx gate flip-flop toggles on every rising edge.
bit 4 TxGSPM: Timerx Gate Single Pulse Mode bit
1 = Timerx Gate Single Pulse mode is enabled and is controlling Timerx gate
0 = Timerx Gate Single Pulse mode is disabled
bit 3 TxGGO/TxDONE
: Timerx Gate Single Pulse Acquisition Status bit
1 = Timerx gate single pulse acquisition is ready, waiting for an edge
0 = Timerx gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when TxGSPM is cleared.
bit 2 TxGVAL: Timerx Gate Current State bit
Indicates the current state of the Timerx gate that could be provided to TMRxH:TMRxL. Unaffected by the
Timerx Gate Enable (TMRxGE) bit.
bit 1-0 TxGSS<1:0>: Timerx Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR(x+1) to match PR(x+1) output
(2)
00 = Timer1 gate pin
The Watchdog Timer oscillator is turned on if TMRxGE = 1, regardless of the state of TMRxON.
Note 1: Programming the TxGCON prior to TxCON is recommended.
2: Timer(x+1) will be Timer4/6/8 for Timerx (Timer3/5/7), respectively.