Datasheet

PIC18F87K22 FAMILY
DS39960D-page 212  2009-2011 Microchip Technology Inc.
REGISTER 16-1: TxCON: TIMERx CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TMRxCS1 TMRxCS0 TxCKPS1 TxCKPS0 SOSCEN TxSYNC
RD16 TMRxON
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 TMRxCS<1:0>: Timerx Clock Source Select bits
10 = Timer1 clock source depends on the SOSCEN bit:
SOSCEN =
0:
External clock from the T1CKI pin (on the rising edge).
SOSCEN =
1:
Depending on the SOSCSEL fuses, either a crystal oscillator on the SOSCI/SOSCO pins or an external
clock from the SCLKI pin.
01 = Timerx clock source is the system clock (FOSC)
(1)
00 = Timerx clock source is the instruction clock (FOSC/4)
bit 5-4 TxCKPS<1:0>: Timerx Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
bit 3 SOSCEN: SOSC Oscillator Enable bit
1 = SOSC/SCLKI are enabled for Timerx (based on the SOSCSEL fuses)
0 = SOSC/SCLKI are disabled for Timerx and TxCKI is enabled
bit 2 TxSYNC
: Timerx External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMRxCS<1:0> =
10:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMRxCS<1:0> =
0x:
This bit is ignored; Timer3 uses the internal clock.
bit 1 RD16: 16-Bit Read/Write Mode Enable bit
1 = Enables register read/write of Timerx in one 16-bit operation
0 = Enables register read/write of Timerx in two eight-bit operations
bit 0 TMRxON: Timerx On bit
1 = Enables Timerx
0 = Stops Timerx
Note 1: The F
OSC clock source should not be selected if the timer will be used with the ECCP capture/compare
features.